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Курс ЦБ на 09.02.2026
$77,05
€91,05

onsemi MM74HC74AMX

артикул MM74HC74AMX
onsemi
производитель
Flip Flop D-Type Pos-Edge 2-Element 14-Pin SOIC N T/R - Tape and Reel
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Технические параметры
Technical
Ambient Temperature Range High
85 °C
Clock Edge Trigger Type
Positive Edge
Frequency
72 MHz
High Level Output Current
-5.2 mA
Logic Function
AND, D-Type, Flip-Flop
Low Level Output Current
5.2 mA
Max Frequency
28 MHz
Max Operating Temperature
85 °C
Max Supply Voltage
6 V
Min Operating Temperature
-40 °C
Min Supply Voltage
2 V
Number of Bits
2
Number of Bits per Element
1
Number of Channels
2
Number of Circuits
2
Number of Elements
2
Number of Input Lines
1
Number of Inputs
1
Number of Output Lines
1
Number of Outputs
2
Output Current
25 mA
Packaging
Cut Tape
Polarity
Non-Inverting
Propagation Delay
10 ns
Quiescent Current
4 µA
Schedule B
8542390000, 8542390000; 8542390000
Turn-On Delay Time
12 ns
Voltage
5 V
Physical
Case/Package
SOIC
Contact Plating
Tin
Mount
Surface Mount
Number of Pins
14
Weight
240.999296 mg
Dimensions
Height
1.5 mm
Length
8.75 mm
Width
4 mm
Compliance
Lead Free
Lead Free
Radiation Hardening
No
REACH SVHC
No SVHC
RoHS
Compliant
Supply Chain
Lifecycle Status
Production (Last Updated: 2 years ago)
Manufacturer Lifecycle Status
ACTIVE (Last Updated: 2 years ago)
Описание

Flip Flop D-Type Pos-Edge 2-Element 14-Pin SOIC N T/R - Tape and Reel

Tape & Reel (TR) 74HC74 e4 74HC flip flop 8.75mm 19ns @ 6V 50pF 94MHz 40ns

FLIP-FLOP, D-TYPE, 94MHZ, NSOIC-14; Logic Family / Base Number: 74HC74; Flip-Flop Type: D; Propagation Delay: 20ns; Frequency: 94MHz; Output Current: 25mA; Logic Case Style: NSOIC; No. of Pins: 14Pins; Trigger Type: Positive Edg

The MM74HC74A utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to the equivalent LS-TTL part. It possesses the high noise immu-nity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL loads. This flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive-going transition of the clock pulse. Preset and clear are independent of the clock and accomplished by a low level at the appropriate input. The 74HC logic family is functionally and pin out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to V CC and ground.

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